The intensifying memory shortage already has its winners. SK Hynix has raised its prices by as much as 70% compared to the final quarter of 2025. Micron has moved away from the consumer sector to double down on enterprise, a move predicated on the fact that its stock has soared by roughly 230% in just over a year. And Samsung anticipates a massive 422% jump in operating profits for its memory division.
“The shortage we are seeing is really unprecedented,” Micron EVP of operations Manish Bhatia told Bloomberg, and that the scarcity could continue past 2026 – a warning already echoed by SK Hynix, which cautioned that supply chain issues could potentially persist until 2028.
While the big three memory manufacturers – SK Hynix, Samsung, and Micron – are already capitalizing on the AI-induced demand, the absence of supply could create an opening for new players to emerge.
So, just who is set to benefit that you might not have thought about?
Arista Networks
With hyperscalers and big-name AI developers moving fast to lock up what remains of server dynamic random access memory (DRAM) and high-bandwidth memory (HBM), what’s the next easiest path to incremental capacity? Higher utilization: faster east–west fabrics and better congestion management.
In distributed AI training, GPUs spend significant time waiting for data and gradient updates to sync across nodes. That idle time, otherwise known as “bubble time,” wastes the expensive HBM sitting in each GPU. So the faster the network, the less time spent waiting, and the more useful work extracted from existing memory.
Enter Arista Networks.
The networking switch and optical module vendor is among those making moves to offer 800 Gb/s (800G) offerings to support intense AI workloads. Its R4 series platforms, unveiled last October, are specifically designed for two-tier AI network designs that cut latency compared to traditional – and far more inefficient – three-tier designs.
According to IDC figures, Arista holds a 19.2% market share in data center switching, which is more than Nvidia’s 11.6%. It posted 29.1% year-over-year growth in the Ethernet space, and counts big names like Meta among early adopters of its "blue box" platforms.
Meanwhile, its 7000-series switches and EOS network operating system have been highly commended by Gartner, citing "high satisfaction" from customers – leading to finding itself listed as a leader in the analyst firm’s coveted data center switch ranking alongside major competitors such as Cisco, Juniper Networks (now Hewlett Packard Enterprise), and Huawei.
Arista’s gaze is firmly set on supporting cloud and AI demand, evidenced by its executive reshuffle last September aiming at “captur[ing] the next wave of growth in enterprise and hyperscale networking” – though it does have one eye on the campus networks space.
The company’s rush to promote its 800G (and likely eventual 1.6 Tb/s) and lower-latency fabrics may just present themselves as memory-busting ways to help AI developers maximize the utilization of current memory resources. As right now, a better networking stack is infinitely less expensive than purchasing more memory, it seems.
Phison Electronics
With firms looking increasingly unable to buy more memory chips, squeezing every last drop of performance from existing hardware looks to be among the next viable options. That's where controllers come in, and Phison is among the players dominating that largely invisible layer.
The Taiwanese company claims to design the brains of more than one in every five solid-state drives (SSDs) shipped worldwide, making it an arguably integral silent partner behind third-party storage vendors.
But despite the ongoing memory crunch, its role essentially shifts away from simply acting as a good old-fashioned commodity supplier. Enterprises can't afford to simply throw more drives at their storage problems. Instead, they need controllers capable of extracting maximum endurance, that can boost input/output operations per second (IOPS) per terabyte, and handle workload optimization at the drive level.
Phison's latest enterprise X2 controllers, which sit inside its Pascari line of SSDs, are designed to enhance AI workloads. The controller's computational storage features allow drives to perform operations on data locally rather than moving it to the host CPU. By pushing these functions closer to the NAND itself, data center customers could reduce their reliance on server-side DRAM for caching and buffering.
The firm’s partnership with StorOne last June is a great illustration of this in action: Phison's aiDAPTIV+ technology integrated AI acceleration directly into storage platforms, combining what were previously separate infrastructure layers into a single system that reduces GPU memory demands during inference workloads. StorOne CEO Gal Naor framed it as “filling the gap between traditional storage and AI infrastructure” for organizations unable to afford to scale memory indefinitely.
By controlling the intelligence layer, Phison's tech can determine how efficiently chips operate. And in a supply-constrained market, that makes its controllers worth paying a premium for, especially when the alternative is waiting months (or years) for an allocation of DDR5 or HBM3.
Astera Labs
Another potential recipient of memory shortage interest is firms developing compute express link (CXL) interconnects. To counter operators not being able to get enough DRAM per node, pooling and oversubscribing memory rather than stuffing every box with expensive registered dual-inline memory modules (RDIMMs) may look promising.
One such firm is Astera Labs, which has been working to maximize performance in AI workloads across hyperscale systems through enhanced memory pooling.
Founded by former Texas Instruments executives, Astera has developed offerings like its Leo line of controllers, which can pool external memory, allowing entire racks of servers to function as a unified, flexible AI fabric. Astera claims its Leo line can increase memory capacity by up to two terabytes, while multiple DDR5 channels offer data transfer rates of up to 5,600 mega-transfers per second (Mt/s).
The Santa Clara, California-based company went public in March 2024, and has since seen its stock jump 160%. With cluster operators looking for ways to stretch already scarce DRAM across more CPU sockets and racks, Astera looks like a potentially lucrative architectural workaround.
Aerospike
The most software-focused entry on this list. While hardware vendors scramble to optimize chips and controllers, Aerospike’s database architecture treats the memory shortage as a design constraint, not a problem to solve.
The Mountain View, California-based firm offers a flash-optimized, NoSQL database that connects directly to an application database. Compared to in-memory databases like Redis or Memcached, Aerospike’s offering combines DRAM and SSDs in a hybrid memory architecture to deliver low latency for applications at scale.
Aerospike’s hybrid memory approach allows its platform to deliver sub-millisecond read latencies (approaching in-memory speeds) while requiring significantly less DRAM per terabyte of data. Its architecture also avoids the cache invalidation headaches as Aerospike doesn't cache data in RAM, meaning there are no excessive hops between storage layers. This allows its platform to treat flash as a primary data store, thereby offering consistent performance that doesn't degrade as datasets grow beyond available memory.
For the investment-minded reader, it’s important to note that Aerospike is private as of this writing. According to Crunchbase, Aerospike has raised $241 million from backers such as CIBC Innovation Banking, Sumeru Equity Partners, and Triangle Peak Partners, among others.
Nvidia
The biggest and potentially most surprising name on this list. But whenever something happens, Nvidia always profits. It’s not infallible, though: remember its quantum-induced stock dip last January? Nvidia did recover mere weeks later, but the same can’t be said of the pure-play quantum stocks that dropped in tandem.
Nvidia’s inclusion on this list then comes as it’s quietly rewriting the rules of server memory architecture through a memory module typically found in smartphones and tablets for its AI data center rack-scale solutions.
The chip giant has started deploying low-power double rata rate 5X (LPDDR5X) in its Grace CPU line to provide high-bandwidth, low-power memory. Samsung’s LPDDR5X offering, showcased in 2024, for example, offers 10.7 Gb/s of memory bandwidth. LPDDR5X also operates at lower voltage than DDR5 RDIMMs with better power gating, a boon for operators running AI clusters that already pull hundreds of kilowatts.
Nvidia’s GB300 NVL72 uses 17TB of LPDDR5X from Micron, providing some 14 Tb/s of bandwidth. By normalizing LPDDR5X in data centers, it effectively sidesteps the DDR5 shortage while opening the door to more tightly integrated GPU-NIC-DPU platforms (think Grace Hopper, MGX nodes) that look less like commodity x86 servers and more like vertically integrated AI fabric appliances where Nvidia controls the entire stack.
A catch here means Nvidia will be in direct competition with smartphone and tablet manufacturers for LPDDR supply. But given Nvidia's current leverage with memory suppliers, it's not hard to guess who wins that negotiation.
Classic Nvidia: solve one bottleneck, create new leverage, repeat.
Honorable mention
Sandisk
Sandisk is already a major memory player, so it gets an honorable mention as it doesn’t quite fit the unlikely bill.
That said, since being spun out of Western Digital last February, its stock has skyrocketed by more than 370%, with the company buoyed by surging AI-fueled demand for NAND flash.
But another string to Sandisk’s bow could see it benefit in the memory supercycle in the coming years – high bandwidth flash (HBF).
Conceived around the same time Sandisk was spun out, the concept is simple: NAND flash integrated with HBM packaging. The result? Up to 16-times the capacity of HBM while delivering comparable bandwidth, all while maintaining a similar price point.
Essentially, cluster operators could use HBF to attach terabytes of memory to GPUs. Google engineers recently suggested HBF can offer 10-times the memory capacity per node to reduce system size to save total cost of ownership and network overhead, as they advocated for the concept to become a reality.
But that’s the thing: while it appears to be more cost-effective than HBM for AI inference, at the time of writing, it’s just a concept. Sandisk and its HBF partner SK Hynix are still working to finalize HBF, with the first samples not expected until at least the second half of 2026. Meanwhile, Sandisk said upon debut that the first inference devices powered by HBF aren’t expected to sample until early 2027. But while its partner SK Hynix suggests the memory dearth may drag on until at least 2028, there could be time for HBF to save the day … just not any time soon.
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