Meta bakes networking on-chip in custom silicon designed to cut CPU hops
MTIA 300’s house onboard NICs to ditch PCIe bottlenecks
MTIA 300’s house onboard NICs to ditch PCIe bottlenecks
More money, more work
Startup claims it can avoid legacy networking ‘baggage’ and design purely for AI workloads
Chip giant ships first 2nm custom compute SoC to power Fujitsu's next-gen supercomputer project
And a new unnamed XPU customer is teased
New network interface card doubles Thor performance and adds congestion control for clusters scaling beyond 100,000 XPUs
Firm aims to build full-stack AI networking infrastructure