South Korea’s Electronics and Telecommunications Research Institute (ETRI) developed a dynamic random access memory (DRAM) structure that stores data without the need for electrical storage.

Dubbed 2T0C – short for two-transistor, zero-capacitor – the memory solution is claimed to support memory stability and longer data retention than earlier attempts to remove the capacitor – a cell that holds charge within the chip – from DRAM.

ETRI’s research aims to solve the power and density limits that come with shrinking memory chips. Most commercial DRAM products use a 1T1C structure, in which one transistor and one capacitor store data together, making it difficult to remove the capacitor from the semiconductor in the equation.

As AI workloads drive demand for faster, lower-power memory, this lack of support leads to the memory wall, which is a growing performance gap between fast processors and relatively slow memory causing system performance to lag as processors spend significant time waiting for data.

With 2T0C, ETRI used oxide semiconductor transistors, including aluminum-doped indium-tin-zinc oxide, which are more commonly used in display technology. It then applied a nitrous oxide plasma process to reduce defects and leakage current, while optimizing the read transistor design to help prevent stored charge from dissipating.

ETRI claimes to have retained data for more than 1,000 seconds and improved the memory window by about 13-times.

"This research confirms that oxide semiconductor technology, which has been developed in the display field, can also be applied to next-generation memory devices,” Sooji Nam, from ETRI’s Flexible Electronic Device Research Laboratory, explained. “ETRI expects that the 2T0C DRAM will play a crucial role in the implementation of three-dimensional semiconductor integration technology and low-power computing systems moving forward."