L2Tek has announced the availability of Gigalight’s silicon photonics (SiPh) transceiver portfolio for customers across the U.K. and Europe.

The British light tech distributor's offering includes 100 Gb/s (100G), 400G, and 800G quad small form-factor pluggable (QSFP) modules.

The 100G DR1 transceiver, available in QSFP28 format, can support up to 500 meters over a single wavelength.

The 400G DR4 model, housed in a QSFP-DD form factor, can deliver four 100G lanes over a 500-meter link. Supporting data rates exceeding 400 Gb/s provides the necessary bandwidth for demanding applications such as AI, high-performance computing (HPC) clusters, and cloud computing.

The 800G DR8 transceiver, meanwhile, is based on a new silicon photonics platform and available in octal small form-factor pluggable (OSFP) format, supporting eight lanes of 100G PAM4. The transceiver is based on a new silicon photonics (SiPh) platform, and is compliant with IEEE 802.3 standards.

L2Tek reports it has been designed to meet the harshest external operating conditions in data centers, including temperature, humidity, and EMI interference.

The releases come with the emergence of silicon photonics as a cost-effective realization of higher transceiver speeds. With the growth in popularity of AI systems, the switching process of moving information around a data center on packet switches has become a pressure point for many companies.

By instead transmitting information using photons, there is a potential solution to alleviate this crunch point. Silicon photonics parts are coming to be seen as a next-level advancement in optical networking technology.

In leveraging the scalability of semiconductor manufacturing, cost-effective solutions can be made possible for high-speed communication and data transmission, in a potential boon for future-proof network designs.

According to L2Tek director Mark Scott-South, the new offering delivers “the bandwidth, density, and energy efficiency needed for AI data centers.”

“These transceivers use advanced modulation and chip-level integration to meet the demands of modern interconnects while offering a compelling alternative to traditional solutions,” Scott-South added.