Cisco gave its Unified Computing System (UCS) rack servers an EPYC 3 upgrade today with new processors from team red.

The UCS C225 M6 and C245 M6 use AMD’s third-generation EPYC 7003-series processors, announced in tandem with AMD Monday. The rack-mount servers are Cisco’s second generation to use AMD processors and are specifically designed for use in latency and throughput sensitive applications. And, like the company's previous generation of UCS servers, they feature native integration with Cisco's Intersight hybrid-cloud platform, which is designed to manage large distributed workloads.

“Together with AMD we are delivering systems optimized for workloads requiring high-core counts, including cloud and virtual desktop infrastructure workloads and massive [input/output]-intensive workloads, such as data analytics,” DD Dasgupta, VP of product management for Cisco Cloud, in a statement.

Cisco is positioning these servers for a variety of workloads including manufacturing, but when combined with the company's Nexus networking portfolio the EPYC 3-based systems become an ideal platform for high-frequency trading, Todd Brannon, senior director of cloud infrastructure marketing, said.

"The trading floors have really just become a place for sound bites and photo ops and all the trading is going on in exchange data centers around the world," Brannon said. "The closer you can get your trading algorithm to the exchange server the more competitive advantage you have in your trading."

"In this particular market it's like the old wild west: the fastest draw, or in this case, the fastest infrastructure wins," he said.

To achieve latencies in the nanosecond range, each UCS server can be equipped with a Nexus smartNIC, which handles networking for the system and also functions as an FPGA where traders can run their algorithms. This, Brannon explains, frees up the processor to handle the flood of I/O required to lower latency.

Cisco also benefits from EPYC's high core counts, which top out at more than twice that of Intel's highest-end Xeon offerings.

According to Rahul Talekar, solutions architect at Cisco, using EPYC processors allows the vendor to achieve performance and core counts that would have required a two-socket Intel system. This would introduce latency due to the interconnect technologies the CPUs use to communicate with each other.

Beyond high core counts, Cisco is also taking advantage of AMD's secure encrypted virtualization encrypted state (SEV-ES) feature set, which enables customers to encrypt memory in use. While not new to EPYC 3, the new chips add support for secure-nested paging in order to protect workloads from malicious hypervisors.

Cisco’s upgraded UCS servers are expected to launch within the next 90 days.