When it comes to telecommunication carriers delivering network services, there has never been a more transformative time. Every provider of a network service is, to one degree or another, recrafting its entire IT infrastructure environment to achieve increased agility and higher scalability at a much lower total cost. What each may find: The strategic use of chips – specifically, NFV coprocessors – will be key to success.
At the core of most NFV efforts is a shift away from physical network appliances. Originally deployed more or less as “router helpers,” the network appliances installed today offload everything from security to load balancing. The trouble is they also introduce additional network hops that impair overall application performance. In addition, each appliance has to be configured and managed, which makes it difficult to scale the overall IT environment with any alacrity.
To address that issue, processor vendors such as Intel have been making an aggressive case of replacing all those appliances by moving more functions back in to multicore processors. The argument is, not only that multicore processors are capable of better handling all those functions at a lower cost, but all the network hops between various appliances are eliminated.
While that sounds reasonable enough, this could be an oversimplification of what will actually occur inside those networking environments. While many network functions will move to x86 processors, coprocessors will be key to NFV success – by handling certain functions in parallel. These NFV coprocessors will be attached directly to servers. The challenge providers of NFV software will face is making sure their offerings are tuned to logically invoke the core x86 processor as well as complementary coprocessors.
Inside the NFV Coprocessor Story
Sujal Das, chief strategy and marketing officer at Netronome Systems, says that functions that will be better handled by coprocessors include network packet processing and the processing of distributed firewall security and object-based storage. This trend is in line with coprocessors being employed to offload the gamut of other functions like machine learning and scientific computing from general-purpose x86 processors to field-programmable gate arrays (FPGAs) and even graphic processing units (GPUs).
A Brave New World for NFV Coprocessors
Kevin Deierling, vice president of marketing for Mellanox, says the Innova IPsec adapter makes use of FPGAs to run an instance of Open vSwitch that processes network and security functions.
“In the future you’ll see a lot more encryption and firewalls being offloaded to a coprocessor,” says Deierling.
Naturally, it will take a long while for this brave new world of networking to come together now and into the 5G networking future. Most carriers are not expected to make next-generation networking services generally available until the end of the decade. But the one thing that is clear is that, while x86 servers may be at the center of that 5G networking universe, the concept of an appliance has not been eliminated altogether. In its place will be a small army of coprocessors that assume the same functions. The only difference: That coprocessor is going to be plugged directly into the server rather than being a network hop away.