Intel CEO Pat Gelsinger sung an unspoken truth about the semiconductor industry Monday: nanometers are a meaningless bar for comparison and a relic of the past.

Since the advent of strained silicon in the late 1990s and FinFET in the early 2010s, the size of the transistor gate has become largely irrelevant, he argued.

Despite this, chipmakers, including Intel, have continued to use nanometers to denote generational improvements in process technology. In other words, nanometers have become shorthand for how densely transistors can be packed into a given space.

As part of this grand admission, Intel adopted new branding that it says more accurately reflects the relative performance of its process nodes. Intel’s upcoming 10-nanometer Super FinFET process becomes Intel 7; its ill-fated 7-nanometer process becomes Intel 4; and the refresh to follow will be Intel 3.

And while I don’t disagree with Intel’s decision to rebrand, I also don’t believe Intel’s motivation is helping customers make informed decisions. Let’s call this what it is: an attempt to disguise the fact Intel has fallen behind.

It’s understandable that Intel would want to distance itself from a naming convention that at best makes it look uncompetitive and at worst incompetent. Intel has struggled to roll out 10-nanometer chips, while its competitors are already moving on to 7 nanometers, and in the case of Apple, 5 nanometers.

And while the new branding scheme certainly downplays the disparity in process technology, it's also an admission that Intel no longer sets the bar for innovation in process technology. You only have to look at its competitor’s roadmaps to see why.

Intel didn’t elaborate on the logic behind the new naming scheme, but the implication is obvious. Intel wants you to think its 10-nanometer Super FinFET chips can go toe-to-toe with Taiwan Semiconductor Manufacturing Co.’s (TSMC) 7-nanometer processor used by rival AMD.

The same is true of Intel 4, which refers to Intel’s long-delayed 7-nanometer process slated for release in early 2023. That process will debut shortly after AMD’s 5-nanometer Zen 4 chips hit the market and coincide with the ramp of TSMC’s 3-nanometer process node.

To our lizard brains, Intel 4, is going to look a lot like Intel not only caught up with AMD but is closing in on TSMC’s cutting-edge node. Suddenly, Gelsinger looks like a hero, when in reality, the story hasn’t actually changed.

From a marketing perspective, it’s a smart move for Intel, which is facing its stiffest competition in decades from long-time rival AMD and up-and-coming chipmakers like Apple and Ampere.

Of course, this whole strategy only works if Intel can stay competitive, and I don’t mean in AVX-512 workloads.

With that said, there’s little doubt in my mind that Intel 7 will offer competitive performance, if not efficiency, compared to AMD’s 7-nanometer Zen 3-based chips. For one, the Intel 7-AMD Zen 3 comparison is a lot more favorable, with Intel pitting a relatively new process against TSMC’s three-year-old design.

Intel 4 will be a much more interesting release as it represents the first truly modern process node using extreme ultraviolet lithography that we’ve seen from Intel to date.

But as I’ve said in the past, Intel’s competitors aren’t standing still, and it remains to be seen whether Intel 4 will be the runaway success the chipmaker is hoping it will be.

I’ll remind you that Intel’s hands were tied when it came to 7 nanometer. It was simply too late in development to retool or move to an outside foundry by the time Gelsinger made his return to Intel.

Arguably the most exciting piece of this puzzle is what the chipmaker is calling Intel 20A.

Slated for release in 2024, the process node will power the first of Intel’s “angstrom-era” CPUs. These chips will utilize a backside power delivery network as well as gate-all-around transistors, which Intel is calling RibbonFET.

By moving power delivery to the underside of the wafer, Intel believes it can achieve more efficient signal routing and thereby boost performance. Meanwhile, RibbonFET promises to dramatically boost transistor densities over FinFET by vertically stacking transistor gates within the channel.

If this sounds familiar, Intel isn’t the only one working on gate-all-around transistors. Earlier this year, IBM announced a 2-nanometer process node using the tech, which is also slated to go into mass production in 2024.

Coincidence? I think not.

It’s no secret that Intel is working with IBM on next-generation manufacturing technologies. The companies announced a partnership back in March with the launch of Intel’s Integrated Design Manufacturing 2.0 initiative.

Ever since IBM unveiled their 2-nanometer proof of concept this spring, I’ve strongly suspected we’d see Intel deploy the technology in short order.

So while Intel has yet to confirm Intel 20A is based on an IBM design, the fact 20 angstroms is equal to 2 nanometers, certainly lends credence to the theory.

Regardless, 2024 is shaping up to be a make-or-break year for Intel.