Intel secured another much-needed win after Google signed on to leverage its Xeon line of processors as part of its hyperscale infrastructure stack.

Hot off the heels of Intel joining Elon Musk’s $20 billion "TeraFab" project, the embattled chip giant announced a “multi-year collaboration” that would see it provide Google with central processing units (CPUs) and “custom infrastructure processing units” (IPUs).

Google Cloud already deploys Intel’s Xeon processors across its workload-optimized instances, including the Xeon 6 line found in the hyperscaler’s C4 and N4 instances.

But the rise of agentic AI has led hyperscalers to increasingly seek out processors. Where graphic processing units (GPUs) are effective brute force machines powering workloads at high speed but with little to no "brains," CPUs act as the thinking part of the stack, essential for orchestrating the complex, latency-intensive tasks performed by agent systems.

That demand has already seen Arm make an unprecedented play, going beyond its traditional licensing expertise to produce its own AGI CPU. And Nvidia is pushing further into the processor space, with its forthcoming Vera data center CPU set to usurp its prior generation Grace line.

Intel has long dominated the CPU space, though recent years have seen x86 ally AMD look to challenge its crown with its EPYC lines growing in popularity.

Google Cloud already makes use of AMD’s 5th-Gen EPYC processors for its C4D and H4D instances, but this latest deal with Intel sees the hyperscaler stand by a long-time processor partner as it continues to source hardware vital to meet that agentic demand.

“Intel has been a trusted partner for nearly two decades, and their Xeon roadmap gives us confidence that we can continue to meet the growing performance and efficiency demands of our workloads,” Amin Vahdat, Google’s chief technologist for AI infrastructure, explained.

Beyond processors, the multi-year deal will see the pair expand their co-development efforts, with a view to designing custom application-specific integrated circuit (ASIC)-based IPUs.

Intel said these programmable accelerators offload networking, storage, and security functions from host CPUs with the view to “improving utilization, increasing efficiency, and enabling more predictable performance across hyperscale AI environments.”

The prospective IPUs when paired with Intel's flagship Xwon line will “form a tightly integrated platform balancing general-purpose compute with purpose-built infrastructure acceleration to deliver more efficient, flexible, and scalable AI systems.”

“AI is reshaping how infrastructure is built and scaled,” Intel CEO Lip-Bu Tan added. “Scaling AI requires more than accelerators – it requires balanced systems. CPUs and IPUs are central to delivering the performance, efficiency, and flexibility modern AI workloads demand.”