Intel today abandoned its decades-old tradition of naming process technologies based on transistor gate widths — a practice CEO Pat Gelsinger called a meaningless bar for comparison during a press conference on Monday.

“Originally, process nodes were named after the physical length of these transistor gates,” he said, adding that since the inception of strained silicon in 1997 and later the development of fin field-effect transistors (FinFET) in 2011, this method no longer reflected the relative performance of one chip versus another.

“These days, the various naming and numbering schemes used across the industry, including ours, no longer refer to any specific measurement and don't tell the full story of how to achieve the best balance of power efficiency and performance,” Gelsinger said.

Because of this, Intel is formally abandoning this practice altogether and adopting new branding that it says more accurately reflects the relative performance of its process nodes.

The move comes as Intel steadily falls behind rival foundry operators like Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung Electronics, which are expected to ramp production of 3-nanometer chips in late 2022.

Moving forward, Intel’s 10-nanometer Enhanced Super FinFET manufacturing process — slated for use in the company’s upcoming AlderLake and Sapphire Rapids processor families — will be renamed Intel 7.

According to Ann Kelleher, SVP and GM of technology development at Intel, Intel 7 will offer between 10% and 15% higher performance per watt over the company’s first-generation 10-nanometer Super FinFET process.

While Intel didn’t elaborate on the reasoning behind the new naming scheme, the branding for Intel 7 invites comparison to TSMC’s 7-nanometer process used by rival AMD.

“This is equivalent to a full node of performance gain,” Kelleher said. “As a result, we believe that Intel 7 is an appropriate name to help customers understand the competitive performance being delivered by the node.”

Meanwhile, the company’s ill-fated 7-nanometer process will bear the Intel 4 moniker when it officially launches in 2023. The process was the source of considerable upset early last year after the company announced it had been delayed by 12 months.

The timing of the launch puts Intel slightly behind AMD’s 5-nanometer Zen 4 processors, which, according to the chipmaker’s roadmap, are slated for release at the end of 2022.

Intel 4 will be followed by Intel 3, which according to Kelleher, will be more of a refinement of the previous generation than a process node shrink. She added that initial testing shows Intel 3 will deliver “around an 18% transistor performance-per-watt increase over Intel 4.”

Intel plans to return to a measurement-based naming scheme with its first generation of “angstrom-era” chips beginning with the Intel 20A in 2024. An angstrom is a unit of measurement that is one-tenth of a nanometer.

Intel 20A will be the first Intel chip to use a backside power delivery network and adopt gate-all-around transistors, which Intel calls RibbonFET.

“Traditional interconnect technology connects on top of the transistor layer. With the resulting intermixing of power and signal wires, routing inefficiencies arise, hampering both performance and power,” explained Sanjay Natarajan, SVP of logic technology development at Intel. “Our solution is a novel process where the power wires are placed underneath the transistor layer on the backside of the wafer.”

Meanwhile, RibbonFET will embrace a new transistor arrangement that vertically stacks transistor gates within a channel allowing for greater compute densities for a given die size. This is the same technology that IBM used to achieve a 2-nanometer process node earlier this year.

Intel 20A will be followed by yet another refinement generation in 2025 called Intel 18A.

Beyond 2025, Intel expects to shift its focus away from electrical packaging to optical packaging technologies utilizing silicon photonics.