The TILE-Gx™ processor family is optimized for networking, video, and cloud applications. It delivers the highest performance per watt per square inch with complete “system-on-a-chip” features.
he family includes processors with 9, 16, 36, or 72 identical processor cores (tiles) interconnected with Tilera’s iMesh™ on-chip network. Each core consists of a full-featured 64-bit processor core as well as L1 and L2 cache and a non-blocking mesh which connects the core into the Tilera Intelligent mesh (iMesh). Up to 23 MBytes of coherent cache is available and the high-end TILE-Gx devices can address up to 1 TB of DDR3 memory. The highly-scalable Tile architecture provides a broad range of performance and price-points to meet the system designer’s requirements – all with an open source and easy to program software environment. All TILE-Gx products are software compatible, and can run the same application software across different core-counts and corresponding performance levels.
The TILE-Gx processor slashes board real estate and system costs by integrating a complete set of DDR3 memory and I/O controllers, eliminating the need for an external north bridge or south bridge. TileDirect™ technology provides coherent I/O traffic directly into the tile caches to deliver ultimate low-latency packet processing performance. Tilera’s DDC’ (Dynamic Distributed Cache) system for fully coherent cache across the tile array enables near-linear performance scaling with core-count for threaded and shared memory applications.
The TILE-Gx processors are programmed in ANSI standard C/C++ or Java, using the familiar GNU tool chain, enabling developers to leverage their existing software investment. Tiles can be grouped in clusters to apply the appropriate, deterministic amount of horsepower to each application, or a homogeneous “sea of compute” approach can be used to distribute work among a large array of cores. The TILE-Gx CPU cores are adept at a variety of processing workloads and can replace multiple CPU and DSP subsystems for both the data plane and control plane. The TILE-Gx integrates an intelligent NIC function that – depending on which processor – can deliver 20Gbps to 80Gbps of, sophisticated traffic classification and load balancing services. The NIC function is C programmable, offering virtually unlimited embedded packet processing features.
|Categories||Networking > Silicon (CPU, NPU, ASIC)|
Use of the SDxCentral service directory is governed by our Terms of Service, including without limitation those sections under the headings "CONTENT", "LICENSING AND OTHER TERMS APPLYING TO CONTENT POSTED ON THE SDXCENTRAL SITES", "INDEMNITY; DISCLAIMER; LIMITATION OF LIABILITY" AND "COPYRIGHTS". Under no circumstances will SDxCentral be liable in any way for any Content, including, but not limited to, liability for any errors or omissions in any Content or for any loss or damage of any kind incurred as a result of the use of any Content posted, emailed or otherwise transmitted via the Sites.