Woven Circuit by Hanna Barakat & Archival Images of AI + AIxDESIGN
– Hanna Barakat, Archival Images of AI, AIxDESIGN | Better Images of AI | CC-BY-4.0

The Open Compute Project Foundation (OCP) has launched a new universal communications standard for connecting different chip components, designed to help operators build faster, more flexible, and cost-efficient AI and high-performance computing (HPC) systems.

Unveiled at the nonprofit’s APAC Summit in Taiwan, the Universal D2D Transaction and Link-Layer specification is designed to make it easier for infrastructure operators to mix and match different chip types, rather than being locked into a single vendor’s ecosystem.

Finalized in June, the specification includes support for the Universal Chiplet Interconnect Express (UCIe) standard, enabling designers to choose different physical (PHY) layers without reworking upper infrastructure layers to enable interoperability and silicon diversity across AI and HPC workloads.

Cliff Grossner, Ph.D., chief innovation officer at OCP, commented: “The OCP recognized several years ago that innovation in silicon needed to be amplified, just as the constraints of larger silicon dies were beginning to impede progress.

“Through its Open Chiplet Economy Project, the OCP has established a strong community to deliver on the new standardizations, tools, and best practices around technical and business workflows that are required for a truly open economy, where vendors sell chiplets embodying their IP to integrators that then build specialized System-in-Packages (SiPs).”

AI and HPC clusters require a considerable amount of hardware to run, with accelerators, CPUs, DPUs, and field programmable gate arrays (FPGAs) coming together with coveted GPUs to power high-intensity workloads.

OCP’s latest effort focuses on silicon die disaggregation, providing cluster operators and designers with greater flexibility by bringing together PHY layers with low-latency, low-overhead packetization so disparate hardware sources can work in tandem – without firms being locked into one interconnect solution.

“We are at an inflection point where chiplet vendors have a fairly complete set of standards and tools available to build chiplet product sets,” said Anu Ramamurthy and Jawad Nasrullah, OCP Open Chiplet Economy Project leads.

“The market leaders developing chiplets are still playing a very important role filling gaps that they identify in current standards, and we expect to see these additional learnings materialize as updates to existing standards as the Open Chiplet Economy matures.”

The launch comes after OCP unveiled plans to create open standards for photonic networking switches. Revealed in July, the Optical Circuit Switching (OCS) Subproject will see OCP members create an open stack that would enable operators to integrate photonic switches into existing network architectures.