As the cloud becomes more disaggregated and compute is pushed further out to the edge where data can be processed closer to the user, Intel believes FPGAs are ideally suited to accelerate latency-sensitive workloads like artificial intelligence (AI) and machine learning.

The chipmaker today shed some light on its new M-Series Agilex FPGAs, which are specifically optimized for memory-intensive workloads.

“The M in M-series means memory,” Sabrina Gomez, director of product marketing at Intel, wrote in a recent blog post.

The FPGAs are based on Intel’s 10-nanometer SuperFIN manufacturing process and are available in a wide array of configurations with large caches of on-die SRAM, optional on-package high-bandwidth memory (HBM), and support for the latest DDR memory and Optane persistent memory modules.

Intel’s designs integrate the SRAM directly into the FPGA’s programmable logic, enabling ultra-low latency access to data. Meanwhile, customers working with large data sets can opt for HBM, which is located on package to further reduce access latencies compared to traditional DDR memory.

Intel’s latest Agilex FPGAs can be equipped with up to 32 GBs of HBM with a total memory bandwidth of 6.5 Tb/s, a 60% increase over the chipmaker’s previous generation Stratix 10 MX FPGAs, Gomez wrote.

Beyond memory, Intel’s M-Series FPGAs also feature high-speed networking capabilities to match, with up to 72 serializer/deserializers and as many as eight transceivers operating at 116 Gb/s.

This enables the cards to support 400 Gb/s Ethernet on PCIe Gen. 5.0-equipped systems. However, it should be noted that PCIe Gen. 5.0-compatible servers won’t start hitting the market until later this year with the launch of Intel’s Sapphire Rapids Xeon Scalable refresh and AMD’s EPYC 4.

Speaking of AMD, Intel isn’t the only vendor touting the benefits of memory-optimized FPGAs. AMD, which recently completed the $35 billion acquisition of Xilinx, is now the world’s largest FPGA manufacturer.

Prior to the acquisition’s close, Xilinx launched a series of HBM-equipped FPGAs under its Versal portfolio. Announced in July last year, Xilinx’s Versal Premium features an integrated FPGA, digital signal processor, and a pair of dual-core arm processors for general and real-time compute.

These capabilities make the chip ideal for security appliances and firewalls, switches, and routers that require high-performance packet processing, as well as compute pre-processing and buffering workloads common in AI training.