Cisco unveiled its most powerful routing silicon to date in an update to the company’s growing Silicon One portfolio. The company’s 11th chip, the P100, is capable of 19.2 Tb/s of full-duplex traffic at port speeds up to 1.6 Tb/s.

“The Cisco Silicon One P100 is the ultimate routing silicon for high-bandwidth applications,” boasted Eyal Dagan, SVP of Cisco’s common hardware group, in a blog post.

The chip is able to achieve this throughput thanks to a combination of technologies, including 112 Gb/s serializer/deserializers (SerDes), Cisco’s second-generation P4 run-to-completion engine, and large tables and deep buffers.

“One thing that’s unique about Silicon One is all the SerDes can be Ethernet ports, so it’s not like some other silicon out there, which has dedicated fabric ports and dedicated Ethernet ports,” Rakesh Chopra, head of the Cisco Silicon One architecture, said. “That means if you build a pizza box… you can connect all 192 SerDes to front panel ports.”

This, he explained, allows the P100 to scale to a variety of form factors and service providers and hyperscale routing applications, ranging from traditional rack-mounted routers to large multi-petabit disaggregated routers.

For example, a single P100 can power a router with 24, 800 Gb/s interfaces at full speed, something Cisco claims would require six of its competitors' chips to achieve.

For higher capacities, multiple P100 chips can be combined. Using three P100s, Cisco's Silicon One customers could offer a line card with 28.8 Tb/s of throughput, or the equivalent to 36, 800 Gb/s interfaces.

“Until now, modular line cards were limited to optical faceplate bandwidth, fabric card connector density constraints, and low bandwidth silicon,” Dagan wrote. This “radically changes the cost, power, latency, and size of the system.”

Cisco Updates G100 Switch Silicon

Alongside the P100, Cisco also announced an update to its G100 chip.

Announced in March, the G100 is a web-scale switching chip capable of 25.6 Tb/s, making it the highest bandwidth capacity of any chip in the Silicon One family.

Like the P100 announced today, the G100 is capable of supporting 1.6 Tb/s per port, though for now it’s limited by available optics to 800 Gb/s per interface.

Thanks to an update to Cisco’s p4 software, the G100 can be used as a fully-schedulable, non-blocking fabric element at speeds up to 25.6 Tb/s.

According to Dagan, these fabric elements in combination with P100-based line cards allow Cisco to achieve “the highest bandwidth, single-chassis router, achieving more than two times the bandwidth of any other solution."