Cisco celebrated a milestone on its Silicon One journey today with the launch of the Catalyst 9500X and 9600X enterprise routing platforms. Both routers are based on Cisco’s 12.8 Tb/s Q200 silicon, but more importantly, Cisco fellow Rakesh Chopra said, they mark the first time the vendor’s Silicon One family is available in an enterprise product.

Ever since Cisco’s first Silicon One products were announced in late 2019, they’ve been limited to high-performance web scale and service provider routing and switching product lines. Today’s announcement sees Cisco retool its Q200 for use in enterprise core and edge use cases.

“All of a sudden now you have Silicon One covering the three big major markets: enterprise, service provider, and web scale with a single common architecture,” Chopra said.

Adapting Cisco’s Q200 to an enterprise environment wouldn’t have been possible using traditional ASICs, Chopra said, adding that thanks to a fully P4 programmable substrate and a novel network processing architecture, the vendor was reprogramed the chips to accommodate the more diverse demands faced by enterprise routers.

Enterprises need to worry about supporting a large number of concurrent clients, each with different security policies, and address translation requirements, he added. “If you're just in the service provider or just in the web scale, you wouldn't have to do any of that stuff.”

The Q200's programmability “allows us to take something that was initially deployed in a service provider core, rewrite a bunch of P4 code, and then all of a sudden have it be deployable in the enterprise,” Chopra said.

Bringing the Q200 to the enterprise space also makes it one of the most powerful single routing chips on the market, he added. “There is no piece of routing silicon on the market that is at 12.8 Tb/s. The next closest is 7.2 terabytes and everybody else drops very significantly off after that.”

Chopra notes that while Silicon One shares a common architecture, that doesn’t mean Cisco is shoehorning the same chip into every use case.

“When we talk about Silicon One, what we’re talking about is a common architecture. It doesn’t mean one device. It doesn’t even mean one specific implementation,” he said. “We're talking about an architecture, which is what we refer to as a language of how the individual blocks inside of a device fit together.”

In fact, the Silicon One portfolio now counts 11 routing and switching chips ranging from the 3.2 Tb/s Q202 and Q202L to the top-of-the-line P100 and G100 at 19.2 Tb/s and 25.6 Tb/s, respectively.

The announcement comes on the heals of Juniper’s Express 5 routing refresh.

While Express 5 doesn’t directly compete with the Q200 or Cisco’s new Catalyst routers, it does challenge the networking giant’s P100, which sits at the top of the networking giant’s Silicon One routing stack. Juniper’s new chip boasts peak throughput up to 28.8 Tb/s compared to Cisco’s 19.2 Tb/s P100.

However, as Dell’Oro analyst Shin Umeda noted in an earlier interview, comparing routing ASICs is hardly an exact science.

"It is always difficult to compare ASICs at any given time because of vendors’ different ASIC and router development and release cycles,” he explained. "Also, the ASIC's announcements do not always align with actual implementation in router products.”