Broadcom today announced the general availability of its Tomahawk 4 series switch chips alongside new Trident series silicon designed for use in top of rack (ToR) switches.

The Tomahawk series is targeted at hyperscale providers. The latest 4-50G iteration is built on a 7-nanometer manufacturing process and offers 25.6 Tb/s of switching capacity across 512 lanes of 50 Gb/s level-four pulse-amplitude modulation (PAM4) Serializer/Deserializers (SerDes). The company claims that while other 25.6 Tb/s-capable switch silicon has been announced, Broadcom is the first to bring that number to market.

Innovium unveiled its own 25.6 Tb/s programmable switch chip, the Teralynx 8, back in May. Like The Tomahawk 4 series chip, the Teralynx 8 is aimed at large data center networks but differs in that it uses 112 Gb/s PAM4 SerDes. The Tomahawk 4 chip launched today uses 50 Gb/s SerDes.

However, Broadcom also announced plans to bring a 100 Gb/s version of the chip to market in 2021. The Tomahawk 4-100G and Tomahawk 4-12.8T, offer 256 and 128 100G PAM4 SerDes, respectively.

"Even with the hyperscalers, they're kind of distributed, with some of them wanting to deploy as soon as possible with 50 Gb/s PAM4 [SerDes], and some of them wanting to go to 100 Gb/s PAM4," said Peter Del Vecchio, product-line manager for Broadcom's Tomahawk 4 and Trident switching lines, in an interview with SDxCentral. "The biggest factor there is what is your choice of optics you're getting and what is the port speed."

Broadcom is attempting to address both groups by providing customers the option of 50 Gb/s SerDes now or 100 Gb/s SerDes later.

Beyond higher speeds, Broadcom said the latest Trident4 also features a fully-shared packet buffer, which the company claims enables a 10-fold improvement in burst absorption and low deterministic latencies, both of which are critical in large hyperscale deployments.

Broadcom also announced the availability of a new switching chip that offers converged switching, routing, and layer 4-7 services. Dubbed the Trident SmarToR, the chip is designed to offer customers greater flexibility for software-defined switching.

In addition to traditional ToR switching, the chip can be programmed to serve load balancing, network address translation, VxLAN gateway, distributed denial of service (DDoS) mitigation, and packet brokering.

According to Del Vecchio, the Trident SmartToR is very similar in concept to the smartNIC or data processing units (DPUs) that have recently entered the market.

"Rather than having the CPU implementing the network-related functionality ... and instead of moving it into a NIC, you move that into the ToR device," he said.

And while Del Vecchio admits that the Trident SmartToR won't replace smartNICs entirely, it does offer some advantages. "You don't have to put an FPGA on every NIC, on every server, you can centralize that," he said.

This also has operational advantages, Del Vecchio added, as customers don't have to push config changes to every server every time a policy changes. A single config can be sent to one device on the rack.

The Trident SmartToR is generally available today.