Samsung is integrating its latest virtualized radio access network (vRAN) product onto Intel’s Xeon processor and vRAN Boost platforms in a push to further accelerate the performance of 5G RAN deployments.

The move has Samsung porting its vRAN 3.0 software onto Intel’s 4th-Gen Xeon Scalable processors that have the vRAN Boost accelerator platform secret sauce. This combination will be able to support more cells with the same number of servers, which can result in higher performance, power savings and cost efficiencies.

The move extends a long-running vRAN relationship between the two, dating back to initial integration work in 2017. That partnership is now powering several commercial tier-one networks, including Verizon in the United States.

The companies stated they have already completed a successful interoperability testing of the new integration, with the combined platform set to be commercially available by the end of this year.

Samsung launched its vRAN 3.0 platform at this year’s MWC Barcelona event. It includes support for massive multiple-input, multiple-output (MINO) radios and the ability to analyze network needs and resource requirements. It can also automate network management for features like sleep mode.

CCS Insight Analyst Richard Webb noted in a report that “this is vital in the RAN, the most energy-intensive domain in the network.”

Dell’Oro Group VP Stefan Pongratz noted in a report tied to the MWC event that Samsung confirmed the performance characteristics of its vRAN platform running at Verizon relative to purpose-built RAN equipment.

“We think we’ve got a significant commercial lead relative to our core competitors on vRAN,” Derek Johnston, head of marketing and 5G business development at Samsung Networks, explained to SDxCentral in an interview about the vRAN 3.0 launch. He added that while the vRAN market remains “nascent,” Samsung is “very confident in terms of our vRAN platform and our ability to incrementally now turn the crank and offer a lot of different features and functionality.”

Johnston’s “nascent” comment tied into ongoing concerns around the pace at which vRAN and, more specifically, open RAN, is being commercially deployed. Operators at the event were cautiously optimistic on both fronts, noting strong ongoing development that is making them more confident in deploying vRAN in commercial networks and ongoing trials with open RAN.

Intel unveiled its latest Xeon scalable processor earlier this year. Dan Rodriguez, corporate VP and GM for Intel’s network and edge group, noted during the product launch that the new chip series provides double the vRAN capacity compared to the previous generation chip series at the same power levels, which he explained will help operators better meet their sustainability goals.

CCS Insight’s Webb noted this work “makes it possible to deploy an end-to-end software-defined network from the core to the RAN.”

“This has a significant impact on operators,” Webb explained. “In terms of network operations, vRAN enables greater agility, flexibility and scalability. It also supports artificial intelligence algorithms in RAN functionality; evolving intelligence in the network to optimize performance, operations and costs.

"For instance, operators can implement dynamic power management and network function redistribution, meaning that failures in network operation and upgrades can be handled by moving the network workload to a different server without sending technicians to a cell site.”

Intel’s latest RAN work with Samsung comes on the heels of the chip giant scoring a deal with Ericsson to use its latest 18A process technology to manufacture custom 5G system-on-chip products for Ericsson. These will be used in Ericsson’s future 5G infrastructure.

Intel explained the 18A architecture will use its RibbonFET technology to support higher performance and a more densely packed chip footprint. The RibbonFET technology is the vendor’s gate-all-around transistor that can provider faster transistor switching speeds using the same drive current as multiple legacy platforms, but in a smaller footprint. Intel has touted this architecture as key to it gaining a “process leadership position in 2025.”